After quite some years (and a handful Apple II users requests) I felt the urge to finally put the T2A2 prototype (read that post to get a more general understanding) into a real expansion card… and here it is: Say “Hello!” to the T2A2 version 1.1!
It came a long way…
…in more detail:
As you can see, the final T2A2 is much smaller than the prototype (which used an 8bit Baby one-for-all PCB) and offers many additional features
- 2 size-1 TRAM slots (or one size-2) – double the processing power!
- Low-power, low-profile parts used where possible (3.3V CPLD, HCT logic)
- External Transputer-link available as edge connector – extend your network to “near infinitum“
- Jumpers for LinkSpeed and optional power to the Transputer-link connector
- Fully buffered to be a good Apple II bus citizen
- Works in any slot set to “your card”
Beyond this, everything said about the prototype is still true.
a) It’s not tested in the ][ or ][+. I simply don’t own one of those.
b) The T2A2 won’t instantly speed up any of your Apple II[e/gs] applications.
It’s more like a co-processor attached to it. And even then, you’ll need something really calculation-intensive to justify the time you’ll loose due to communication between the Apple and the Transputer. A single square-root for example wouldn’t make much sense – but having a complex algorithm (like the Mandelbrot fractal in my demo) does absolutely make sense, as you just pass the parameters to the Transputer and let him do the sweating.
But on the other hand, FPU cards like the Innovative Systems FPE (using an M68881) did just send instruction by instruction. So I somehow fancy the idea writing a SANE driver for GS/OS to integrate the T2A2 more transparently.
Want your own T2A2?
So now you’re keen to get one yourself? Please check this list first:
- Do you have a TRAM already? (*)
- You are aware that there’s no real software (yet) besides my little Mandelbrot demo?
- You are keen to program something yourself – or are fine to wait until somebody else did?
While the Apple II side of coding is pretty easy, you have to get a grip about the Transputer development, too. That includes a DOS/Windows (<=XP) setup and some knowledge of C and/or OCCAM.
Plenty of Dev-Docs are available here.
I suggest using the INMOS cross-compilers for C or OCCAM. An alternative C compiler came from LSC, which might suit you more if you don’t like the INMOS stuff.
Ok, so you’re still with me… so I have the first batch of 20 T2A2 PCBs ready which I will populate on-demand, and for 50€/55USD (plus shipping) one of them can be yours.
(*) I might be able to offer you a TRAM, too. The price depends on available model, RAM size and CPU used.
Some more technical details
Here’s a T2A2 with a size-1 TRAM installed in Slot-0:
The T2A2’s CPLD programming can be updated any time through a JTAG port (the lower 2×5 pin-row at the edge).
The jumper above it can be used to set the linkspeed for the TRAMs (10 or 20mbps). If you look very close, there’s a tiny LED next to that jumper. It’s the error LED controlled by the CPLD.
The next single jumper enables the VCC pins on the external Link connector, meant for (small!) external extensions. This connector is the same used on the Gerlach card and is very convenient because of its ubiquitous standard 2×5 shrouded pcb header connector. Here’s the pinout:
As said, the V1.1 T2A2 offers two size-1 TRAM slots. Before plugging in 40MIPS of raw processing power consider the amount of juice being pulled there. Depending on the amount of RAM and load a single TRAM can use up to 800mA of power! 😯
Given the max. of 4A on a standard IIgs power-supply, two TRAMs could bring your souped-up GS into trouble… it’s better to use the external connector with just one smaller TRAM or even simply bridge the Link0In/Out pins with Link3In/Out so that the T2A2 works as a TRAM-less adapter.
That said, there are size-2 TRAMs in existence which will snugly fit and won’t hurt that much.